At this year’s IEDM, Intel outlined the further development of its own production. The company expects stacked 3D transistors to increase transistor density by 30 to 50 percent. In addition, more than ten times as many interconnects should soon be possible as in the current production.
Just in time for the 67th edition of the IEDM conference, Intel has outlined the future of its own production and made some prognoses. After 2025, the introduction of stacked 3D transistors, also known as nanoribbon or GAAFET (Gate-All-Around-FET), should increase transistor density by a further 30 to 50 percent.
Together with improvements in other areas, Moore’s law should still be complied with. For the future, i.e. for sub-nanometer processes, Intel is also researching the use of new materials in order to be able to make the transistors even smaller. The company will be a little more specific with future DRAM products: In the future, ferromagnetic materials will be used here.
Not just transistors in focus
In contrast, Intel expects significantly more changes than with transistor scaling in terms of packaging, which the company has focused on in recent years. Here, the new technology Foveros Direct should enable a more than ten times higher contact density for the future, which should result in more possibilities when combining different chips on the same package.
New manufacturing processes should also help with the power management of your own chips. Here Intel highlights the first-time integration of GaN transistors on silicon wafers. The aim is to combine the properties of GaN semiconductors, which are good for power electronics circuits, with the properties of silicon, which are important for computing circuits. Unfortunately, no concrete numerical values are provided here, but there are efficiency improvements and a reduction in the number of necessary components on the mainboard.
Most recently, Intel also highlighted the importance of quantum research, which companies are currently engaged in. There are currently silicon-based solutions as well as those based on tiny magnets in the room. These are supposed to replace the previous, purely electrical data processing. Unfortunately, Intel does not provide any specific details here.